This course contains the introductory part of combinational Logic along with the clear concepts of K-Maps and Quine-Mc Cluskey Method. It also introduces sequential networks with flip flops and FSM, FPGA and VHDL, and testing and verification.
8.2.1. Fault models: SA0, SA1, and Design for Testability Verbal Notes | Digital System Design BSC-CSIT | TU | TABFlux